Dielectric isolated devices and circuits, generally denoted by "DIC", have long been known in the semiconductor art. They comprise devices and circuits in which the components (transistors, diodes, resistors, etc.) are formed in single crystal semiconductor tubs or islands embedded in an insulated supporting matrix, for example, a polycrystalline semiconductor such as polysilicon with a dielectric liner between the poly and the single crystal island. Each island of single crystal semiconductor material is separated from the supporting matrix and the adjacent islands by the dielectric liner. Hence, there is excellent electrical isolation between the individual islands and low parasitic capacitance. However, the packing density is comparatively low since, generally, only one device is placed in each island and space must be left between the islands for the dielectric liner and separating poly support matrix. Typical DIC methods and structures are described in U.S. Pat. Nos. 3,407,479, 3,431,468, 3,457,123, 3,461,003, 3,508,980, 3,876,480, 3,902,936, 3,929,528, and 4,649,630 which are incorporated herein by reference.
The process by which DIC structures are made is much more arduous than the processes conventionally used for most other types of semiconductor devices and circuits This is because great effort must be expended in obtaining the basic DIC wafer with the isolated single crystal islands before the conventional device formation process may begin. Further, dimensional tolerance control is vastly more difficult with DIC wafers because of the need to remove the bulk of the original substrate from which the islands are obtained. In particular, it is very difficult to control the precise thickness of the isolated single crystal islands across the DIC wafer There is an ongoing and long felt need for improved DIC structures and fabrication processes in which critical device dimensions are less susceptible to process variations. Accordingly, it is an object of the present invention to provide an improved configuration and process for DIC structures which are less susceptible to process variations. It is a further object of the present invention to provide an improved configuration and process for DIC structures wherein a buried layer and buried layer contact, and an epi region of well controlled thickness, are provided in selected islands, even though the island thickness varies substantially.